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19-1424; Rev 0; 1/99
Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer
General Description
The MAX4589 low-voltage, dual 2-channel multiplexer is designed for RF and video signal processing at frequencies up to 200MHz in 50 and 75 systems. On-chip functions are controlled through either a parallel interface or an SPITM/QSPITM/MICROWIRETM serial interface. Each channel of the MAX4589 is designed using a "T" switch configuration, ensuring excellent high-frequency off-isolation. The MAX4589 has low on-resistance of 60 max, with an on-resistance match across all channels of 4 max. Additionally, on-resistance is flat across the specified signal range (2 max). The offleakage current is under 1nA at TA = +25C, and less than 10nA at TA = +85C. The MAX4589 operates from single +2.7V to +12V or dual 2.7V to 6V supplies. When operating with a positive supply of +5V, the inputs maintain TTL/CMOSlevel compatibility. The MAX4589 is available in 20-pin DIP, wide SO, and SSOP packages. o High Off-Isolation: -74dB at 10MHz o Low Crosstalk: < -70dB up to 10MHz o 20MHz -0.1dB Signal Bandwidth o 200MHz -3dB Signal Bandwidth o 60 (max) On-Resistance with 5V Supplies o 4 (max) On-Resistance Matching with 5V Supplies o 2 (max) On-Resistance Flatness with 5V Supplies o +2.7V to +12V Single-Supply Operation 2.7V to 6V Dual-Supply Operation o Low Power Consumption: <20W o Rail-to-Rail(R) Bidirectional Signal Handling o Parallel or SPI/QSPI/MICROWIRE-Compatible Serial Interface o >2kV ESD Protection per Method 3015.7 o TTL/CMOS-Compatible Inputs with VL = +5V
Features
o Low Insertion Loss: < -2.5dB up to 100MHz
MAX4589
Applications
RF Switching Video Signal Routing High-Speed Data Acquisition Automatic Test Equipment Networking
Pin Configuration
PART TOP VIEW
GND 1 COM1 2 V+ 3 NO1 4 GND 5 NO2 6 2/4 7 RS 8 CONTROL LOGIC LE/CS 9 A1/SCLK 10 12 EN 11 A0/DOUT
Ordering Information
TEMP. RANGE 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -40C to +85C PIN-PACKAGE 20 SSOP 20 Wide SO 20 Plastic DIP 20 SSOP 20 Wide SO 20 Plastic DIP MAX4589CAP
MAX4589
20 SER/PAR 19 COM2 18 V17 NO3 16 GND 15 NO4 14 VL 13 DIN
MAX4589CWP MAX4589CPP MAX4589EAP MAX4589EWP MAX4589EPP
SSOP/SO/DIP
SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
________________________________________________________________ Maxim Integrated Products
1
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Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer MAX4589
ABSOLUTE MAXIMUM RATINGS
(Voltages referenced to GND) V+ ...........................................................................-0.3V to +13V VL ......................-0.3V to (V+ + 0.3V) or 7V (whichever is lower) V- ...........................................................................-13V to +0.3V V+ to V-...................................................................-0.3V to +13V VNO_, VCOM_ to GND (Note 1)..............(V- - 0.3V) to (V+ + 0.3V) 2/4, RS, LE, CS, A1/SCLK, A0/DOUT, EN, DIN, SER/PAR to GND ......-0.3V to (V+ + 0.3V) Continuous Current into Any Terminal..............................20mA Peak Current into Any Terminal (pulsed at 1ms, 10% duty cycle)...................................40mA ESD per Method 3015.7.......................................................2kV Continuous Power Dissipation (TA = +70C) SSOP (derate 9.1mW/C above +70C)............................727mW Wide SO (derate 10mW/C above +70C)........................800mW Plastic DIP (derate 11.1mW/C above +70C) .................889mW Operating Temperature Ranges MAX4589C_ P ......................................................0C to +70C MAX4589E_ P ...................................................-40C to +85C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10sec) .............................+300C
Note 1: Voltages on these pins exceeding V+ or V- are clamped by internal diodes. Limit forward diode current to maximum current rating.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS--Dual Supplies
(V+ = VL = +4.5V to +5.5V, V- = -4.5V to -5.5V, VINH = +2.4V, VINL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C, V+ = VL = +5V, V- = -5V.) (Note 2) PARAMETER ANALOG SWITCH Analog Signal Range (Note 3) On-Resistance On-Resistance Match Between Channels (Note 4) On-Resistance Flatness (Note 5) VCOM_, VNO_ RON RON V+ = 5V, V- = -5V, VNO_ = 2V, ICOM_ = 4mA V+ = 5V, V- = 5V, VNO_ = 2V, ICOM_ = 4mA V+ = 5V; V- = -5V; VNO_= 1V, 0, -1V; ICOM_ = 4mA V+ = 5.5V, V- = -5.5V, VCOM_ = 4.5V, VNO_ = 4.5V V+ = 5.5V, V- = -5.5V, VCOM_ = 4.5V, VNO_ = 4.5V V+ = 5.5V, V- = -5.5V, VCOM_ = 4.5V, VNO_ = floating +25C C, E +25C C, E +25C C, E +25C C, E +25C C, E +25C C, E -1 -10 -2 -20 -2 -20 0.01 0.01 0.01 0.5 1 V40 V+ 60 75 4 5 2.5 3 1 nA 10 2 nA 20 2 nA 20 V SYMBOL CONDITIONS TA MIN TYP MAX UNITS
RFLAT(ON)
NO_ Off-Leakage Current (Note 6)
INO_ (OFF)
COM_ Off-Leakage Current (Note 6)
ICOM_ (OFF)
COM_ On-Leakage Current (Note 6)
ICOM_ (ON)
4 LOGIC INPUTS (2/4, RS, LE/CS, A1/SCLK, AO/DOUT, EN, DIN, SER/PAR) Input Logic Threshold High Input Logic Threshold Low Input Threshold Hysteresis Input Current IIN VIN_ = 0 or VL C, E -1 VINH VINL C, E C, E 2.4 1.7 1.5 0.2 0.03 1 0.8 V V V A
2
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Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer
ELECTRICAL CHARACTERISTICS--Dual Supplies (continued)
(V+ = VL = +4.5V to +5.5V, V- = -4.5V to -5.5V, VINH = +2.4V, VINL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C, V+ = VL = +5V, V- = -5V.) (Note 2) PARAMETER DOUT Logic Low Output DOUT Logic High Output SYMBOL VOL VOH CONDITIONS ISINK = 3.2mA ISOURCE = -1mA VNO_ = 3V, V+ = 4.5V, V- = -4.5V, Figure 1 VNO_ = 3V, V+ = 4.5V, V- = -4.5V, Figure 1 VNO_ = 3V, V+ = 5.5V, V- = -5.5V, Figure 2 CL = 1.0nF, VNO_ = 0, RS = 0, Figure 3 VNO_ = 0, fIN = 1MHz, Figure 4 VCOM_ = 0, fIN = 1MHz, Figure 4 VCOM_ = 0, fIN = 1MHz, Figure 4 VNO_ = 1VRMS, f = 10MHz, all channels off, Figure 5 VNO_ = 1VRMS, f = 10MHz, Figure 5 Figure 5 Figure 5 2-channel mode 4-channel mode 2-channel mode 4-channel mode TA C, E C, E +25C C, E +25C C, E C, E +25C +25C +25C +25C +25C +25C +25C +25C 10 180 15 2 4 6 -74 -70 200 150 20 15 80 0 80 80 6.25 80 80 60 0 150 VL - 1 380 550 600 300 350 MIN TYP MAX 0.4 UNITS V V LOGIC OUTPUT (SERIAL INTERFACE)
MAX4589
SWITCH DYNAMIC CHARACTERISTICS Turn-On Time Turn-Off Time Break-Before-Make Time Delay (Note 3) Charge Injection NO_ Off-Capacitance COM_ Off-Capacitance COM_ On-Capacitance Off-Isolation (Note 7) Channel-to-Channel Crosstalk -3dB Bandwidth -0.1dB Bandwidth PARALLEL-INTERFACE TIMING A_, EN to LE Rise Setup Time A_, EN to LE Rise Hold Time LE Low Pulse Width RS Low Pulse Width SERIAL-INTERFACE TIMING Operating Frequency SCLK Pulse Width High SCLK Pulse Width Low DIN to SCLK Rise Setup Time DIN to SCLK Rise Hold Time tDS tDH tL tRS fCLK tCH tCL tDS tDH Figure 6 Figure 6 Figure 6 Figure 6 Figure 7 Figure 7 Figure 7 Figure 7 Figure 7 C, E C, E C, E C, E C, E C, E C, E C, E C, E ns ns ns ns MHz ns ns ns ns tON tOFF tBBM Q CNO_(OFF) CCOM_(OFF) CCOM_(ON) VISO VCT BW BW ns ns ns pC pF pF pF dB dB MHz MHz
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Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer MAX4589
ELECTRICAL CHARACTERISTICS--Dual Supplies (continued)
(V+ = VL = +4.5V to +5.5V, V- = -4.5V to -5.5V, VINH = +2.4V, VINL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C, V+ = VL = +5V, V- = -5V.) (Note 2) PARAMETER CS Fall to SCLK Rise Setup Time CS Fall to SCLK Rise Hold Time CS Rise to SCLK Rise Hold Time CS Rise to SCLK Rise Setup Time SCLK Rise to DOUT Valid RS Low Pulse Width POWER SUPPLY Power-Supply Range V+ Supply Current V- Supply Current VL Supply Current SYMBOL tCSS0 tCSS1 tCSH1 tCSS1 tDO tRS V+, VVL I+ IIL V- = -5.5V, V+ = 5.5V V- = -5.5V, V+ = 5.5V VL = 5.5V, all VIN_= 0 or VL +25C C, E +25C C, E C, E Figure 7 Figure 7 Figure 7 Figure 7 CL = 50pF, Figure 7 Figure 6 CONDITIONS TA C, E C, E C, E C, E C, E C, E 80 2.7 +2.7 -1 -10 -1 -10 -10 2 0.0001 0.0001 6 V+ 1 10 1 10 10 MIN 50 80 0 80 150 TYP MAX UNITS ns ns ns ns ns ns
V A A A
ELECTRICAL CHARACTERISTICS--Single +5V Supply
(V+ = VL = +4.5V to +5.5V, V- = 0, VINH = +2.4V, VINL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C, V+ = VL = +5V.) (Note 2) PARAMETER ANALOG SWITCH Analog Signal Range (Note 3) On-Resistance On-Resistance Match Between Channels (Note 4) On-Resistance Flatness (Note 5) NO_ Off-Leakage Current (Notes 6, 8) COM_ Off-Leakage Current (Notes 6, 8) COM_ On-Leakage Current (Notes 6, 8) VCOM_, VNO RON RON RFLAT(ON) INO_ (OFF) ICOM_ (OFF) ICOM_ (ON) V+ = 5V, VNO_ = 3V, ICOM_ = 4mA V+ = 5V, VNO_ = 3V, ICOM_ = 4mA V+ = 5V; ICOM_ = 4mA; VNO_ = 2V, 3V, 4V V+ = 5.5V; VCOM_ = 4.5V, 1V; VNO_ = 1V, 4.5V V+ = 5.5V; VCOM_ = 4.5V, 1V; VNO_ = 1V, 4.5V V+ = 5.5V; VCOM_ = 4.5V 1V; VNO_ = 4.5V, 1V, or floating +25C C, E +25C C, E +25C C, E +25C C, E +25C C, E +25C C, E -1 -10 -2 -20 -2 -20 0.005 0.005 0.005 4 1 0 80 V+ 120 150 8 10 10 12 1 10 2 20 2 20 V nA nA nA SYMBOL CONDITIONS TA MIN TYP MAX UNITS
4
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Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer
ELECTRICAL CHARACTERISTICS--Single +5V Supply (continued)
(V+ = VL = +4.5V to +5.5V, V- = 0, VINH = +2.4V, VINL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C, V+ = VL = +5V.) (Note 2) PARAMETER Input Logic Threshold High Input Logic Threshold Low Input Threshold Hysteresis Input Current DOUT Logic Low Output DOUT Logic High Output IIN VOL VOH VIN = 0 or VL ISINK = 3.2mA ISOURCE = -1mA VNO__ = 3V, V+ = 4.5V, Figure 1 VNO__ = 3V, V+ = 4.5V, Figure 1 VNO__ = 3V, V+ = 5.5V, Figure 2 CL = 1.0nF, VNO_ = 2.5V, RS = 0, Figure 3 VNO_ = 1VRMS, f = 10MHz, all channels off, Figure 5 VNO_ = 1VRMS, f = 10MHz, Figure 5 Figure 5 Figure 5 2-channel mode 4-channel mode 2-channel mode 4-channel mode C, E C, E C, E +25C C, E +25C C, E C, E +25C +25C +25C +25C +25C 10 200 5 -65 -70 100 75 10 7 80 0 80 80 150 VL - 1 550 800 900 300 350 -1 LOGIC OUTPUT (SERIAL INTERFACE) 0.4 V V SYMBOL VINH VINL CONDITIONS TA C, E C, E MIN 2.4 TYP 1.7 1.5 0.2 1 0.8 MAX UNITS V V V A 4 LOGIC INPUTS (2/4, RS, LE/CS, A1/SCLK, AO/DOUT, EN, DIN, SER/PAR
MAX4589
SWITCH DYNAMIC CHARACTERISTICS Turn-On Time Turn-Off Time Break-Before-Make Time Delay (Note 3) Charge Injection Off-Isolation Channel-to-Channel Crosstalk -3dB Bandwidth -0.1dB Bandwidth PARALLEL-INTERFACE TIMING A_, EN to LE Rise Setup Time A_, EN to LE Rise Hold Time LE Low Pulse Width RS Low Pulse Width tDS tDH tL tRS Figure 6 Figure 6 Figure 6 Figure 6 C, E C, E C, E C, E ns ns ns ns tON tOFF tBBM Q VISO VCT BW BW ns ns ns pC dB dB MHz MHz
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5
Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer MAX4589
ELECTRICAL CHARACTERISTICS--Single +5V Supply (continued)
(V+ = VL = +4.5V to +5.5V, V- = 0, VINH = +2.4V, VINL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C, V+ = VL = +5V.) (Note 2) PARAMETER SERIAL-INTERFACE TIMING Operating Frequency SCLK Pulse Width High SCLK Pulse Width Low DIN to SCLK Rise Setup Time DIN to SCLK Rise Hold Time CS Fall to SCLK Rise Setup Time CS Rise to SCLK Rise Hold Time CS Rise to SCLK Rise Setup Time CS Fall to SCLK Rise Hold Time SCLK Rise to DOUT Valid RS Low Pulse Width POWER SUPPLY Power-Supply Range fCLK tCH tCL tDS tDH tCSS0 tCSH1 tCSS1 tCSS1 tDO tRS V+ VL I+ IL V+ 6.5V V+ > 6.5V V+= 5.5V, VIN = 0 or VL VL = 5.5V, all VIN_ = 0 or VL +25C C, E C, E Figure 7 Figure 7 Figure 7 Figure 7 Figure 7 Figure 7 Figure 7 Figure 7 Figure 7 CL = 50pF, Figure 7 Figure 6 C, E C, E C, E C, E C, E C, E C, E C, E C, E C, E C, E 80 2.7 2.7 2.7 -1 -10 -10 2 12 V+ 6.5 1 10 10 80 80 60 0 50 0 80 80 150 6.25 ns ns ns ns ns ns ns ns ns ns ns V V A A SYMBOL CONDITIONS TA MIN TYP MAX UNITS
V+ Supply Current VL Supply Current
ELECTRICAL CHARACTERISTICS--Single +3V Supply
(V+ = VL = +2.7V to +3.6V, V- = 0, VINH = +2V, VINL = +0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C, V+ = VL = +3V.) PARAMETER ANALOG SWITCH Analog Signal Range (Note 3) On-Resistance VCOM_,VNO RON V+ = 2.7V, VNO_ = 1V, ICOM_ = 1mA +25C C, E C, E C, E VIN_ = 0 or VL VNO__ = 1.5V, V+ = 2.7V, Figure 1 VNO__ = 1.5V, V+ = 2.7V, Figure 1 VNO__ = 1.5V, V+ = 3.6V, Figure 2 C, E +25C C, E +25C C, E C, E 10 350 250 -1 700 2.0 0.5 1 1000 1200 400 500 0 240 V+ 350 450 V SYMBOL CONDITIONS TA MIN TYP MAX UNITS
4 LOGIC INPUT (2/4, RS, LE/CS, A1/SCLK, AO/DOUT, EN, DIN, SER/PAR Input Logic Threshold High Input Logic Threshold Low Input Current VINH VINL IIN V V A A ns ns ns
SWITCH DYNAMIC CHARACTERISTICS Turn-On Time Turn-Off Time Break-Before-Make Time Delay (Note 3) 6 tON tOFF tBBM
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Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer
ELECTRICAL CHARACTERISTICS--Single +3V Supply (continued)
(V+ = VL = +2.7V to +3.6V, V- = 0, VINH = +2V, VINL = +0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C, V+ = VL = +3V.) PARAMETER PARALLEL-INTERFACE TIMING A_, EN to LE Rise Setup Time A_, EN to LE Rise Hold Time LE Low Pulse Width RS Low Pulse Width SERIAL-INTERFACE TIMING Operating Frequency SCLK Pulse Width High SCLK Pulse Width Low DIN to SCLK Rise Setup Time DIN to SCLK Rise Hold Time CS Fall to SCLK Rise Setup Time CS Rise to SCLK Rise Hold Time CS Rise to SCLK Rise Setup Time CS Fall to SCLK Rise Hold Time SCLK Rise to DOUT Valid RS Low Pulse Width POWER SUPPLY V+ Supply Current VL Supply Current Note 2: Note 3: Note 4: Note 5: fCLK tCH tCL tDS tDH tCSS0 tCSH1 tCSS1 tCSS1 tDO tRS Figure 7 Figure 7 Figure 7 Figure 7 Figure 7 Figure 7 Figure 7 Figure 7 Figure 7 CL = 50pF, Figure 7 Figure 6 C, E C, E C, E C, E C, E C, E C, E C, E C, E C, E C, E +25C C, E C, E 80 -1 -10 -10 1 1 10 10 200 200 100 0 100 0 200 200 250 2.1 MHz ns ns ns ns ns ns ns ns ns ns tDS tDH tL tRS Figure 6 Figure 6 Figure 6 Figure 6 C, E C, E C, E C, E 200 0 200 80 ns ns ns ns SYMBOL CONDITIONS TA MIN TYP MAX UNITS
MAX4589
I+ IL
V+ = 3.6V, VIN = 0 or VL VL = 3.6V, all VIN = 0 or VL
A A
The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column. Guaranteed by design. RON = RON(MAX) - RON(MIN). Resistance flatness is defined as the difference between the maximum and the minimum value of on-resistance as measured over the specified analog-signal range. Note 6: Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at TA = +25C. Note 7: Off-isolation = 20log10 [VCOM_ / VNO_], VCOM_ = output, VNO_ = input to off switch. Note 8: Leakage testing for single-supply operation is guaranteed by testing with dual supplies.
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Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer MAX4589
Typical Operating Characteristics
(V+ = VL = +5V, V- = -5V, TA = +25C, unless otherwise specified.)
ON-RESISTANCE vs. VCOM (SINGLE SUPPLY)
MAX4589toc01 MAX4589toc02
ON-RESISTANCE vs. VCOM (DUAL SUPPLIES)
100 90 80 70 RON () 60 50 40 30 20 10 0 -5 -4 -3 -2 -1 0 1 2 3 4 5 VCOM (V) 0 0 50 V = 4V V = 5V V = 3V RON () V = 2.5V 250
ON-RESISTANCE vs. VCOM AND TEMPERATURE (DUAL SUPPLIES)
MAX4589toc03
55 50 45 RON () TA = +85C TA = +25C 40 35 30 TA = -40C
V- = 0 200 V+ = +2.5V
150 V+ = +3.0V 100 V+ = +3.6V V+ = +5V V+ = +9V
V+ = +12V
25 20
2
4
6 VCOM (V)
8
10
12
-5
-4
-3
-2
-1 0 1 VCOM (V)
2
3
4
5
ON-RESISTANCE vs. VCOM AND TEMPERATURE (SINGLE SUPPLY)
MAX4589toc04
ON/OFF-LEAKAGE CURRENT vs. TEMPERATURE
MAX4589toc05
CHARGE INJECTION vs. VCOM
30 CHARGE INJECTION (pC) 25 20 15 10 5 SINGLE SUPPLY DUAL SUPPLIES
MAX4589toc06
120 100 80 RON () 60 40 20 0 0 TA = +85C TA = +25C TA = -40C
100
35
LEAKAGE CURRENT (pA)
ON-LEAKAGE
10 OFF-LEAKAGE
1 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VCOM (V) -40 -20 0 20 40 60 80 TEMPERATURE (C)
0 -5 -4 -3 -2 -1 0 1 2 3 4 5 VCOM (V)
tON, tOFF vs. SUPPLY VOLTAGE
MAX4589toc07
tON, tOFF vs. TEMPERATURE
400 350 CURRENT (A)
MAX4589toc08
POWER-SUPPLY CURRENT vs. TEMPERATURE
1 100n 10n 1n 100p 10p 1p 0.1p -40 -20 0 20 40 60 80 I+, IMAX4589toc09
600 500 400 TIME (ns) 300 200 tOFF 100 0 2.0 2.5 3.0 3.5 4.0 4.5
450 tON
10 IL
TIME (ns)
tON
300 250 200 150 100 50 0 5.0 -40 -20 0 20 40 60 80 tOFF
DUAL SUPPLY VOLTAGE (V)
TEMPERATURE (C)
TEMPERATURE (C)
8
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Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer
Typical Operating Characteristics (continued)
(V+ = VL = +5V, V- = -5V, TA = +25C, unless otherwise specified.)
INSERTION LOSS, OFF-ISOLATION, AND CROSSTALK vs. FREQUENCY (DUAL SUPPLIES)
MAX4589toc11
MAX4589
INSERTION LOSS, OFF-ISOLATION, AND CROSSTALK vs. FREQUENCY (SINGLE SUPPLY)
0 -10 AMPLITUDE (dB) -20 -30 -40 -50 -60 CROSSTALK RS = 75 RL = 600 INSERTION LOSS
MAX4589toc12
10 0 -10 AMPLITUDE (dB) -20 -30 -40 -50 -60 -70 -80 -90 100k 1M 10M FREQUENCY (Hz) 100M OFF-ISOLATION CROSSTALK ON LOSS
10
RS = 75 RL = 600
-70 -80 -90 1G 100k 1M 10M FREQUENCY (MHz) 100M 1G OFF-ISOLATION
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9
Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer MAX4589
Pin Description
PIN 1, 5, 16 2 3 4 6 7 NAME GND COM1 V+ NO1 NO2 2/4 FUNCTION Ground. Connect to ground plane. See Grounding section. Analog Switch Common Terminal. See Truth Tables. Analog Positive Supply Voltage Input Normally Open Analog Input Terminal. See Truth Tables. Normally Open Analog Input Terminal. See Truth Tables. Multiplexer Configuration Control. Connect to VL to select dual 2-channel mode. Connect to GND for single 4-channel multiplexer operation. See Truth Tables. Active-Low Reset Input. In serial mode, drive RS low to force the latches and shift registers to the power-on reset state and force all switches open. In parallel mode, drive RS low to force the latches to the power-on reset state and force switches open. See Truth Tables. In parallel mode this pin is the transparent Latch Enable. In the serial mode, this pin is the Chip-Select input. See Truth Tables. In parallel mode, A1/SCLK is the most significant address bit. If 2/4 is high, A1/SCLK is ignored. In the serial mode, A1/SCLK is the serial shift clock input. Data is loaded on the rising edge of SCLK. See Truth Tables. In parallel mode, this pin is the least significant address bit. In serial mode, DOUT is the output from the internal 4-bit shift register. DOUT is intended for daisy-chain cascading. DOUT is not three-stated by CS. See Serial Operation. Switch Enable. Drive EN low to force all channels off. Drive high to allow normal multiplexer operation. Operates asynchronously in serial mode. In parallel mode, EN is latched when the LE signal is high. Serial Data Input. In serial mode, data is loaded on the rising edge of SCLK. Connect to VL or GND in parallel mode. Logic Supply Input. Powers the DOUT driver and other digital circuitry. VL sets both the input threshold levels and the output logic levels. Normally Open Analog Input Terminal. See Truth Tables. Normally Open Analog Input Terminal. See Truth Tables. Analog Negative Supply Voltage Input. Connect to GND for single-supply operation. Analog Switch Common Terminal. See Truth Tables. Interface Select Input. Drive low for parallel data interface operation. Drive high for serial data interface operation and to enable the DOUT driver.
8
RS
9 10
LE/CS A1/SCLK
11
A0/DOUT
12 13 14 15 17 18 19 20
EN DIN VL NO4 NO3 VCOM2 SER/PAR
10
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Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer MAX4589
V+ V+
LE/CS
NO_
VNO_
50% EN
50%
MAX4589
EN COM_ 300 VVSWITCH IS TIMED FROM 50% LEVEL OF DIGITAL SIGNAL. GND VOUT 30pF VOUT 90% 90%
tOFF
tON
Figure 1. Turn-On/Turn-Off Time
V+ LE/CS SER/PAR V+ NO_ NO_ VNO_
A0
MAX4589
A0 COM_ 300 VVGND VOUT 30pF
VOUT
90%
90%
GND tBBM
Figure 2. Break-Before-Make Time Delay
V+ LE/CS SER/PAR V+ NO_ 1nF 10F VNO_ EN
MAX4589
EN COM_ CL GND VVQ = VOUT * CL VOUT IS THE MEASURED VOLTAGE DUE TO CHARGE TRANSFER ERROR Q WHEN THE CHANNEL TURNS OFF. VOUT VOUT VOUT
Figure 3. Charge Injection
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11
Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer MAX4589
V+ V+ NO_ FLOATING V+ V+ NO_ 1MHz CAPACITANCE ANALYZER
MAX4589
COM_ GND VV1MHz CAPACITANCE ANALYZER
MAX4589
COM_ GND VV-
GND FLOATING
Figure 4. NO_, COM_ Capacitance
V+ V+ NO_ 49.9 56 50 + -
MAX4589
NO_ 24.9 50
MEASURE NODE
VV-
COM_ 560 50
MEASURE NODE
ALL SIGNALS NORMALIZED TO VCOM = 0dB. .
Figure 5. Off-Isolation, Crosstalk, and Bandwidth
tL
LE
tDS
tDH
A0, A1, EN
tRS
MAX4589
RS NOTE: ALL INPUT SIGNALS ARE SPECIFIED WITH tR AND tF <10ns. TIMING IS MEASURED FROM 50% OF DIGITAL SIGNAL.
Figure 6. Parallel Timing Diagram
12 ______________________________________________________________________________________
Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer MAX4589
CS
tCSS
tCH
tCL
tCSH
MAX4589
SCLK tDS tDH
DIN
A0 tDO
A1
BIT 3
DISABLE
DOUT
NOTE: ALL INPUT SIGNALS ARE SPECIFIED WITH tR AND tF < 10ns. TIMING IS MEASURED FROM 50% OF DIGITAL SIGNAL.
Figure 7. Serial Timing Diagram
_______________Detailed Description
Logic-Level Translators
The MAX4589 is constructed of high-frequency "T" switches, as shown in Figure 8. The logic-level inputs are translated by amplifier A1 into a V+ to V- logic signal that drives the internal control logic. The internal control logic drives the gates of N-channel MOSFETs N1 and N2 from V+ to V-, turning them fully on or off. The same signal drives inverter A2 (which drives the Pchannel MOSFETs P1 and P2, turning them fully on or off) from V+ to V-, and turns the N-channel MOSFET N3 on and off. The logic-level threshold is determined by VL and GND.
Frequency response in 75 systems is reasonably flat up to 50MHz, with typically 2.5dB of insertion loss. Higher-impedance circuits show even lower attenuation (and vice versa), but slightly lower bandwidth due to the increased effect of the internal and external capacitance and the switch's on-resistance. The MAX4589 is optimized for 5V operation. Using lower supply voltages or a single supply increases switching time, on-resistance (and therefore on-state attenuation), and nonlinearity.
Switch Off Condition
When the switch is off, MOSFETs N1, N2, P1, and P2 are off and MOSFET N3 is on (Figure 8). The signal path is through the parasitic off-capacitances of N1, N2, P1, and P2, but it is shunted to ground by N3. This forms a highpass filter whose exact characteristics are dependent on the source and load impedances. In 75 systems, and below 1MHz, the attenuation exceeds 80dB. This value decreases with increasing frequency and increasing circuit impedances. External capacitance and board layout dominate overall performance.
Switch On Condition
When the switch is on, MOSFETs N1, N2, P1, and P2 are on and MOSFET N3 is off (Figure 8). The signal path is COM_ to NO_, and because both N-channel and P-channel MOSFETs act as pure resistances, it is symmetrical (i.e., signals pass in either direction). The off MOSFET, N3, has no DC conduction, but has a small amount of capacitance to GND. The MAX4589's construction allows an exceptional 200MHz -3dB bandwidth.
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Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer MAX4589
N1 NO_ P1
N2 COM_ P2
N3
V+ VL A_ GND VA1 CONTROL LOGIC A2
Figure 8. T-Switch Construction
__________Applications Information
Power-Supply Considerations
Overview The MAX4589 construction is typical of many CMOS analog switches. It has four supply pins: V+, V-, VL, and GND. V+ and V- are used to drive the internal CMOS switches and set the limits of the analog voltage on any switch. Reverse ESD-protection diodes are internally connected between each analog signal pin and both V+ and V-. If the voltage on any pin exceeds V+ or V-, one of these diodes conducts. During normal operation these reverse-biased ESD diodes leak, forming the only current drawn from V- and V+. Virtually all the analog leakage current is through the ESD diodes. Although the ESD diodes on a given signal pin are identical, and therefore fairly well balanced, they are reverse-biased differently. Each is biased by either V+ or V- and the analog signal. This means their leakages vary as the signal varies. The difference in the two diode leakages from the signal path to the V+ and V- pins constitutes the analog signal-path leakage current. All analog leakage current flows to the supply terminals, not to the other switch terminal. This explains how both sides of a given switch can show leakage currents of either the same or opposite polarity.
There is no connection between the analog signal paths and GND. The analog signal paths consist of an
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N-channel and P-channel MOSFET with their sources and drains paralleled and their gates driven out of phase to V+ and V- by the logic-level translators. VL and GND power the internal logic and logic-level translators, and set the input logic thresholds. The logic-level translators convert the logic levels to switched V+ and V- signals to drive the gates of the analog switches. Therefore, the gate-to-source and gate-to-drain impedances are the only connection between the logic supplies and the analog supplies.
Bipolar-Supply Operation The MAX4589 operates with bipolar supplies between 2.7V and 6V. The V+ and V- supplies are not required to be symmetrical, but their sum cannot exceed the absolute maximum rating of 13.0V. Do not connect the MAX4589 V+ pin to +3V and connect the logic-level input pins to TTL logic-level signals. This exceeds the absolute maximum ratings, and may cause damage to the part and/or external circuits. CAUTION: The absolute maximum V+ to V- differential voltage is 13.0V. Typical "6-Volt" or "12-Volt" supplies with 10% tolerances can be as high as 13.2V. This voltage can damage the MAX4589. Even 5% tolerance supplies may have overshoot or noise spikes that exceed 13.0V.
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Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer
Single-Supply Operation The MAX4589 operates from a single supply between +2.7V and +12V when V- is connected to GND. Observe all of the precautions listed in the BipolarSupply Operation section. Note, however, that these parts are optimized for 5V operation, and AC and DC characteristics are degraded significantly when operating at less than 5V. As the overall supply voltage (V+ to V-) is reduced, switching speed, on-resistance, off-isolation, and distortion are degraded (see Typical Operating Characteristics). Single-supply operation also limits signal levels and interferes with grounded signals. When V- = GND, AC signals are limited to 300mV below GND. Voltages below this level are clipped by the internal ESD-protection diodes, and the parts can be damaged if excessive current flows. Power Off When power to the MAX4589 is off (i.e., V+ = 0 and V= 0), the Absolute Maximum Ratings still apply. This means that none of the MAX4589 pins can exceed 0.3V. Voltages beyond 0.3V cause the internal ESDprotection diodes to conduct, with potentially catastrophic consequences. Power-Supply Sequencing When applying power to the MAX4589, follow this sequence: V+, V-, VL, then logic inputs. Apply signals on the analog NO_ and COM_ pins any time after V+ and V- are set. Turning on all pins simultaneously is acceptable only if the circuit design guarantees concurrent power-up.
The power-down sequence is the opposite of the power-up sequence. That is, the VL and logic inputs must go to zero potential before (or simultaneously with) the V- then V+ supplies. Always observe the Absolute Maximum Ratings to ensure proper operation. threshold.) With VL = +5V and GND = 0, the threshold is about 1.6V, ensuring compatibility with TTL- and CMOSlogic drivers.
MAX4589
AC Ground and Bypassing
A ground plane is mandatory for satisfactory highfrequency operation. Prototyping using hand wiring or wire-wrap boards is not recommended. Make the ground plane solid metal underneath the device, without interruptions. Avoid routing traces under the device itself. For DIP packages, this applies to both sides of a two-sided board. Failure to observe this has a minimal effect on the "on" characteristics of the switch at high frequencies, but it will degrade the off-isolation and crosstalk. When using the SO package of the MAX4589 on PC boards with a buried ground plane, connect the GND pins to the ground plane with a separate via. Do not share this via with any other ground path. Providing a ground via on both sides of the SMT land further enhances the off-isolation by lowering the parasitic inductance. With the DIP package, connect the through-holes directly to the buried plane or thermally relieve them, as required, to meet manufacturability requirements. Again, do not use these through-hole pads as the current path for any other components. Bypass the V+ and V- pins to the ground plane with surface-mount 0.1F capacitors. Locate these capacitors as close as possible to the pins on the same side of the board as the device. Do not use feedthroughs or vias for bypass capacitors. If board layout dictates that the bypass capacitors are mounted on the opposite side of the PC board, use short feedthroughs or vias, directly under the V+ and V- pins. Use multiple vias if possible. If V- = GND, connect it directly to the ground plane with solid copper. Keep all traces short.
Signal Routing
Keep all signal traces as short as possible. Separate all signal traces from each other, and keep them away from any other traces that could induce interference. Separating the signal traces with generously sized ground wires also helps minimize interference. Routing signals via coaxial cable, terminated as close to the MAX4589 as possible, provides the highest isolation.
Grounding
DC Ground Considerations Satisfactory high-frequency operation requires that careful consideration be given to grounding. For most applications, a ground plane is strongly recommended and the GND pin must connect to it with solid copper. While the V+ and V- power-supply pins are common to all switches in a given package, each input pair is separated with ground pins that are not internally connected to each other. This contributes to the overall high-frequency performance by reducing channel-to-channel crosstalk. The digital inputs have voltage thresholds determined by V L and GND. (V- does not influence the logic-level
Board Layout
IC sockets degrade high-frequency performance and are not recommended if signal bandwidth exceeds 5MHz. Surface-mount parts, having shorter internal lead frames, provide the best high-frequency performance. Keep all bypass capacitors close to the device, and separate all signal leads with ground planes. Use
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Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer MAX4589
vias to connect the ground planes on each side of the board. Logic-level signal routing is not critical.
Impedance Matching
The MAX4589 is intended for use in 75 systems, where the inputs are terminated external to the IC and the COM terminals are connected to an impedance of 600 or higher. The MAX4589 operates in 50 and 75 systems with terminations through the IC. However, variations in on-resistance and on-resistance flatness cause nonlinearities.
Crosstalk and Off-Isolation
The graphs shown in the Typical Operating Characteristics for crosstalk and off-isolation are taken on adjacent channels. The adjacent channel is the worst-case condition. For example, NO1 has the worst off-isolation to COM1 due to its close proximity. Choosing channels wisely necessitates separating the most sensitive channels from the most offensive. Conversely, the above information also applies to the NO3 and NO4 inputs to the COM2 pin.
a 4-bit SPI/MICROWIRE write operation. Systems that must write longer data streams can ignore all but the last four bits. Refer to Figure 7 for a detailed diagram of the serial-interface logic. The first bit loaded is A0, then A1, then an unused bit, followed by the disable bit. There are four flip-flops in the input shift register. The output of the 4th shift register is output on DOUT on the rising edge of A1/SCLK. This allows cascading of multiple MAX4589s using only one chip-select line. For example, one 16-bit write programs the shift registers of four cascaded MAX4589s. The data from the shift register is moved to the internal control latches only upon the rising edge of CS, so all four MAX4589s change state simultaneously. RS has the same effect as the internal power-on reset (POR) signal. The POR state is A0 = A1 = 0 and disable = 1. In serial mode, 2/4 is not used. Connect it to GND or VL; do not leave 2/4 unconnected.
Parallel Operation
The parallel mode is activated by driving SER/PAR to a logic low. The MAX4589 is then programmed by a latched parallel bus scheme. Refer to Figure 6 for a detailed diagram of the parallel-interface logic. If 2/4 is high, A1 is disabled and the MAX4589 is configured as a dual 1-of-2 multiplexer. If 2/4 is low, the MAX4589 is configured as a 1-of-4 multiplexer. It is best to hard-wire 2/4 to a known state for the desired mode of operation, or to use a dedicated microcontroller port pin.
Power-On Reset (POR)
The MAX4589 has internal circuitry to guarantee that all switches are off on power-up (POR). This is equivalent to the state resulting from asserting RS during normal operation.
Serial Operation
The serial mode is activated by driving the SER/PAR input pin to a logic high. The data is then entered using
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Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer
Truth Tables
Parallel Operation
SER/PAR 0 x 1 0 0 0 0 0 0 0 A1 x x x x 0 0 1 1 x x A0 x x x x 0 1 0 1 0 1 EN x x x 0 1 1 1 1 1 1 LE 1 x x 0 0 0 0 0 0 0 RS 1 0 1 1 1 1 1 1 1 1 4 2/4 x x x x 0 0 0 0 1 1 SWITCH STATES Maintain previous state. All switches off, latches are cleared. Serial Mode. Refer to Serial Operation Truth Table. All switches off. Connect NO1 to COM1 Connect NO2 to COM1 Connect NO3 to COM2 Connect NO4 to COM2 Connect NO1 to COM1and NO3 to COM2 Connect NO2 to COM1and NO4 to COM2
MAX4589
x = Don't Care. Note: 2/4 is not latched when LE is high. When LE is low, all latches are transparent. A1, A0 and EN are latched. Connect COM1 to COM2 externally for 1-of-4 single-ended operation.
Serial Operation
P SER/PAR 1 0 1 1 1 1 CS x x x 1 0 x SCLK x x x x DIN x x x x x x EN x x 0 1 1 1 RS 0 x 1 1 1 1 DOUT 0 High-Z * * * * SWITCH STATES All switches off, latches and shift register are cleared. This is the Power-On Reset (POR) state. Parallel Mode. Refer to Parallel Operation Truth Table. All switches off. Chip unselected. Input shift register loads one bit from DIN. DOUT updates on rising edge of SCLK. Contents of shift register transferred to control latches.
x = Don't Care. *DOUT is delayed by 4 clock cycles from DIN.
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Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer MAX4589
Truth Tables (continued)
4 Control Bit and 2/4 Logic
DISABLE BIT 1 0 0 0 0 0 0 BIT 3 x x x x x x x A1 BIT x 0 0 1 1 x x A0 BIT x 0 1 0 1 0 1 4 2/4 PIN x 0 0 0 0 1 1 All switches off. Connects NO1 to COM1 Connects NO2 to COM1 Connects NO3 to COM2 Connects NO4 to COM2 Connects NO1 to COM1 and NO3 to COM2 Connects NO2 to COM1 and NO4 to COM2 SWITCH STATES
x = Don't Care. Note: A0, A1, BIT 3, and DISABLE are the 4 bits latched into the MAX4589 with a MICROWIRE/SPI write, respectively. A0 is the LSB (first bit clocked in), BIT 3 is not used, and DISABLE is the MSB (last bit clocked in).
___________________Chip Information
TRANSISTOR COUNT: 853
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Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer
Package Information
SSOP.EPS
MAX4589
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PDIPN.EPS
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Low-Voltage, High-Isolation, Dual 2-Channel RF/Video Multiplexer MAX4589
Package Information (continued)
SOICW.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
20 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 1999 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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